The constant emphasis in the design of computer systems has been to make such systems faster and able to handle larger amounts of information so that they may accomplish more work in less time. The ability of computers to do more work in less time is also enhanced by their ability to do more different kinds of work. For example, computers have become more useful in various applications with the advent of computer graphics displays which allow the presentation of numbers and text with pictures and graphs enhancing the meanings of the numbers and text. It has become the belief of a great number of people in the computer industry that a graphical output should be present on almost all computer systems.
In a typical computer system, a graphics controller sends video signals to monitors and also controls a frame buffer memory system. Data representing, for example, fonts are written into a frame buffer associated with the computer system. The graphics controller typically extracts the characters of the font to scan them onto a computer display or monitor.
A first conventional system for providing for a command stream for rendering data into the frame buffer on system memory requires that the command be downloaded directly from a central processing unit (CPU) via the graphics controller. In such an I/O buffer based system, a storage element, commonly referred to as first in first out (FIFO) buffer, within the graphics controller is utilized to provide the data from the CPU to the graphics engine. There are two problems with this implementation. First, the FIFO buffer can be filled to varying degrees depending upon the relative speeds of the graphics engine and the CPU. If the graphics engine is relatively fast compared to the CPU, then the graphics engine is waiting for data from the CPU. This will adversely affect the overall system performance. If on the other hand the CPU is faster than the graphics engine, the FIFO may become full and then the CPU must either poll the graphics engine or the graphics engine must interrupt the CPU operation periodically. Accordingly, this type of system utilizes a considerable amount of processing power or overhead to perform these tasks.
In a multiprocessing environment, the interrupt is not utilized because there would be no effective way of determining the status of the processors when the interrupt takes place. Accordingly, in a multiprocessing environment, the typical method for utilizing the above-identified system is for the CPU to poll the graphics engine. Therefore, in a typical multiprocessing environment, if the FIFO buffer overflows, the graphics engine will send the command stream to a buffer within the graphics controller. The system will shut down because this is a failure mode. Thereafter, the system is rebooted or restarted based on normal operating conditions.
In a second conventional system, hereinafter referred to as a direct memory access (DMA) buffer system, a CPU accesses the system memory. That system memory in turn can be accessed by the graphics controller. A FIFO buffer is within the system memory which retains the command stream. This command stream can then be obtained by the graphics controller. The advantage of the DMA buffer system over the first conventional system is that the graphics controller polls the system memory asynchronously from the CPU, and since the system memory is larger, there is less chance that the memory FIFO can become full. However, as is also seen, the problem is that if the FIFO buffer is double-buffered, it is divided in half, based on both the CPU and the graphics controller having concurrent access to the FIFO buffer. Accordingly, an inherent problem with the second conventional system is that the size of the system memory buffer is effectively reduced by fifty percent (50%), thereby degrading the overall performance of the system. In addition, there is still significant overhead associated with CPU management of the FIFO buffer. For example, if the FIFO is a circular buffer, the CPU must still ensure that the write pointer does not overrun the read pointer and that the write pointer does not overrun the end of the buffer. In addition, the CPU must also ensure that the FIFO is not full.
Accordingly, what is needed is a system that provides a command stream more efficiently in a computer system. The system must be efficient, easily implemented and a cost-effective alternative to existing systems. The present invention solves such needs.